Electronic Design

Creating On-Chip MEMS Sensors in CMOS

Nanusens' novel approach to creating nanoscale sensor structures inside the CMOS layers. How the methodology helps shrink cost and size. Previously, MEMS sensors were created by employing proprietary ...
EDN

Extreme Design: Realizing a single-chip CMOS 56 Gs/s ADC for 100 Gbps Ethernet

To provide a long-haul, 100-Gbps, optical transport network with maximum reach and immunity to optical fiber non-idealities, the industry has settled on dual-polarization quadrature phase-shift keying ...
Computerworld

DRAM glut driving up chip capacity, technology

People can cheer the ongoing DRAM chip glut, despite its impact on companies and their stock prices. Lower prices for the chips are encouraging PC vendors to install more DRAM per box these days, and ...
Semiconductor Engineering

Understanding and Mitigating Column-Based Read Disturbance in DRAM Chips (ETH Zurich, CISPA)

A new technical paper titled “ColumnDisturb: Understanding Column-based Read Disturbance in Real DRAM Chips and Implications for Future Systems” was published by researchers at ETH Zurich and CISPA.